1. Field of the Invention
The present invention relates to a method of dicing a wafer to form a semiconductor chip to be electrically connected in a stack.
2. Description of Related Art
In a case where a semiconductor chip is mounted on a printed wiring board by flip-chip bonding or a case where semiconductor chips are joined to each other by overlapping one of the semiconductor chips with the other semiconductor chip to construct a semiconductor device having a chip-on-chip structure, a face-down mounting system or a face-up mounting system is applicable, for example. The face-down system is a mounting system in which the surface of a semiconductor chip is opposed to the surface of a printed wiring board or another semiconductor chip. Contrary to this, the face-up system is a mounting system in which the reverse surface of a semiconductor chip is opposed to the surface of a printed wiring board or another semiconductor chip. The surface of the semiconductor chip is a surface on the side of an active surface layer region where a functional device is formed on a semiconductor substrate forming a base body, and a surface opposite thereto is the reverse surface.
In a case where the face-down system is used, a metal electrode portion called a bump is formed in a raised state on the surface of the semiconductor chip. The bump is joined to a connecting pad formed on the surface of the printed wiring board or the other semiconductor chip.
In a case where the face-up system is used, a connecting pad on the surface of the semiconductor chip and a connecting pad on the surface of the printed wiring board or the other semiconductor chip are connected to each other by wire bonding.
In the case where the face-down system is used, the surface of the semiconductor chip is opposite to the printed wiring board or the other semiconductor chip as a base chip. Accordingly, it is impossible to take a structure in which three or more semiconductor chips are stacked by further joining to the semiconductor chip another semiconductor chip. Therefore, there is a limit to an improvement in an integration degree.
In the case where the face-up system is used, in the printed wiring board or the base semiconductor chip, a connecting pad must be provided outside the region where the semiconductor chip is stacked and joined thereto, for convenience of wire bonding. Therefore, the overall occupied area is considerably large, thereby preventing the integration degree from being improved.
An object of the present invention is to provide a semiconductor chip capable of improving an integration degree and a semiconductor device using the same.
Another object of the present invention is to provide a method of fabricating a semiconductor chip capable of improving an integration degree.
In a semiconductor chip according to the present invention, a through portion penetrating through the surface and the reverse surface of the semiconductor chip is formed in a scribe line region in the vicinity of an active region where a functional device is formed, and a conductive member is arranged in the through portion.
The active region is a region where a functional device such as a transistor, a resistor, or a capacitor, internal wiring appended thereto, and so forth are formed. Contrary to this, the scribe line region is a region in the vicinity of a scribe line which is a cut line in a case where each chip is diced from a large semiconductor substrate (wafer).
According to the above-mentioned construction, the through portion is formed in the scribe line region, and the conductive member is arranged in the through portion. Consequently, the scribe line region is utilized, thereby making it possible to pull out a connecting end of a terminal provided on the surface of the semiconductor chip toward the reverse surface of the semiconductor chip without increasing the size of the semiconductor chip.
Even when the semiconductor chip is joined to another solid device (for example, a printed wiring board or another semiconductor chip) by a face-down system, therefore, another semiconductor chip can be overlapped with and joined to the reverse surface of the semiconductor chip. Consequently, it is possible to increase the integration degree of the semiconductor device using the semiconductor chip.
When the semiconductor chip is joined to another solid device by a face-up system, the conductive member arranged in the through portion is connected to a connecting portion (a bump or a connecting pad) in the solid device on the reverse surface of the semiconductor chip, thereby making it possible to achieve electrical connection between the semiconductor chip and the solid device. Consequently, the solid device forming a base need not have a large area as in the case of connection by wire bonding. Therefore, it is possible to increase the integration degree of the semiconductor device using the semiconductor chip.
The conductive member may be a conductive paste, or a metal layer such as a plating layer formed on an innerwall surface of the through portion.
The through portion may be a groove opening sideward on a sidewall surface of the semiconductor chip.
The through portion may be a through hole blocked from a side part of the semiconductor chip.
Furthermore, an internal circuit formed in the active region and the conductive member may be electrically connected to each other by wiring, thereby making it possible to make electrical connection to the internal circuit on the reverse surface of the semiconductor chip.
The semiconductor device according to the present invention comprises a semiconductor chip constructed as described above, and a solid device having a connecting portion joined to the conductive member on the reverse surface, which is a surface opposite to an active surface layer side surface of the semiconductor chip.
By the construction, the above-mentioned effect can be achieved in a semiconductor device having a structure in which a semiconductor chip and another solid device (a printed wiring board, another semiconductor chip, or the like) are stacked.
A method of fabricating a semiconductor chip according to the present invention is a method of fabricating a semiconductor chip by cutting a semiconductor substrate along a scribe line, which comprises the steps of forming a through hole penetrating through the surface and the reverse surface of the semiconductor substrate in a scribe line region that is a region in the vicinity of the scribe line on the semiconductor substrate; and arranging a conductive member in the through hole.
By this method, it is possible to fabricate the semiconductor chip constructed as described above through relatively easy steps.
The step of forming the through hole may comprise the step of forming a recess having such a depth that it does not penetrate through the whole thickness of the semiconductor substrate from the surface of the semiconductor substrate, and the step of grinding the semiconductor substrate from the reverse surface of the semiconductor substrate so that the hole communicates with a space on the reverse surface of the semiconductor substrate. Consequently, it is possible to shorten the step of opening the semiconductor substrate (for example, the etching step).
The through hole may be formed on the scribe line.
The through hole may be formed in a position avoiding the scribe line.
In order to reduce the number of through holes to be formed, it is preferable to form the through holes on the scribe line. Consequently, it is possible to shorten a time period required for the steps.
The step of forming the through hole may comprise the step of forming a resist film having an opening corresponding to the position where the through hole is formed on the surface of the semiconductor substrate and the step of etching the semiconductor substrate using the resist film as a mask. In this case, the step of arranging the conductive member in the through hole may comprise the step of arranging the conductive member in the through hole using the resist film as a mask.
In this method, the resist film for forming the through hole in the semiconductor substrate can be also utilized for an arrangement of the conductive member in the through hole. Consequently, it is possible to simplify the steps of fabricating the semiconductor chip.
The arrangement of the conductive member in the through hole may be made by selectively plating an innerwall surface of the through hole with a metal.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.